Amplifying circuits for conditioning low level signals are well known. One type of such an amplifying circuit is commonly referred to as a reset integrator circuit. The reset integrator circuit comprises an amplifier, a capacitor, and a switch for discharging or resetting the capacitor. The input signal, e.g. the current output of the infrared detector element, is amplified and used to accumulate a charge upon the capacitor. The process of accumulating a charge is known as integration. The switch is used to reset the capacitor prior to each integration cycle.
The charge accumulated upon the capacitor provides a voltage which is representative of the detector output over the integration cycle. The voltage is typically transferred to a sample and hold circuit from which it is multiplexed to signal processing circuitry.
Although reset integrator circuits function adequately as input circuits for many applications, certain limitations arise with respect to power consumption requirements for amplifying signals of various amplitudes including very low level amplitudes. In order to satisfy such dynamic range requirements the reset integrator circuit is penalized in the form of power consumption requirements and capacitor requirements. The present invention is directed to a circuit and technique for obtaining the advantages of the reset integrator circuit without the associated disadvantages discussed above.
The output of the reset integrator circuit is responsive to the voltage across the capacitor. If the capacitor becomes fully charged it can no longer respond to an additional input signal. That condition, known as capacitor saturation, can be avoided by utilizing a larger capacitor. However, the cost penalties related to utilizing such a capacitor in integrated circuit surface area, component expense, and power consumption are undesirable, particularly where the input circuit is intended to operate on low level signals. The present invention addresses these deficiencies by providing the technique for expanding the effective dynamic range of the reset integrator circuit beyond the limitations of the capacitor. Thus, greater dynamic range is achieved without the attendant penalties relating to component costs and power consumption. Prior to the present invention several alternate approaches to the problem of capacitor saturation have been considered. One such approach incorporates a non-linear amplifier stage in series with the reset integrator. The non-linear amplifier stage provides constantly diminishing output to the capacitor for each increment of input signal, thus preventing saturation of the capacitor. Though this technique adequately avoids the need to replace the capacitor, it does not adequately address the issue of power consumption. Moreover, this technique results in a lack of gain uniformity from channel to channel (due to the lack uniformity inherent in non-linear amplifiers) and results in offset drift.
A second alternative technique for addressing deficiencies inherent in the reset integrator circuit involves fabricating a non-linear integration capacitor. The capacitance of the non-linear integration capacitor would increase with proportion to the amount of charge stored upon the capacitor. Unfortunately such non-linear integration capacitors are difficult and expensive to fabricate.
A third alternative is to fabricate a piece-wise, linear approximation to a non-linear capacitor by providing one or more additional capacitors across the primary integration capacitor during the integration interval. The additional capacitors are selectively connected to the input at predetermined voltage thresholds and serve to accommodate signal levels in excess of that which would saturate the primary integration capacitor. The additional capacitors are typically comparable in size to the primary integration capacitor and would consume the same amount of surface area on an integrated circuit wafer. Moreover, the switching action resulting in the injection of additional capacitors to the input circuit results in distortion of the input signal.
Accordingly, it is desirable to provide a reset integrator circuit that operates at low signal levels, has a wide dynamic range of response, and does not result in excessive power consumption, the need for expensive components, or result in the injection of errors due to the sequential introduction of additional capacitors. These and other objects and advantages are addressed by the present invention, which is described below in connection with the preferred embodiment illustrated in the drawings.